While my last summer in Jaipur was nothing more than a monotonous drag, this summer has been a lot more fun than I thought! For one thing, I'm working on a really interesting, fun and challenging project which is awesomely titled, 'Multi Core Electronic Design Automation', the aim of which is about trying to close down the so called 'design gap' as far as EDA tools of today are concerned. With the end of the unicore era, our processors are no longer becoming faster (wait, let me explain). Having two or four or one million cores isn't going to make your Quake I game run any faster because Quake I, isn't multi threaded and will utilise only _one_ core of your multi/many core architecture. So as they say, the free lunch is over and we've really got to change our approach to solving real world problems using computers. We need to make sure that our algorithms can be parallelised and they're scalable as far as an increase in the number of processing elements is concerned. EDA is a field that's been badly hit by the transition to the multi core age because Moore's law isn't exactly slowing down and hence, the complexity of the hardware to be designed is growing at a rate that is much faster than the rate of improvement in the tools that exist to design the said kind of circuitry. With the kind of time to market constraints that exist today, hardware designers are having a rather tough time keeping up and this is where the need to parallelise EDA tools becomes of utmost importance because these tools are yet to grow out of the unicore era. How do we make better use of the increased computational power that multi core architectures offer? What kind of changes do we incorporate into the algorithms used for VLSI design? These are the questions that are to be answered in this research and it's really fun to be giving this problem a shot!

Apart from my project, we've had two LUG-Jaipur meetings here in MNIT in a gap of 2 weeks. You may check out the pictures from the event here. Furthermore, I'd been to IIT-Madras for the OPECG-2009 workshop (Optimising Performance of parallel programs on Emerging multi-Core architectures and GPUs, which is by the way, the worst abbreviation ever). The workshop was rather disappointing owing to the fact that they didn't keep most of their promises and ended up being more or less introductory. Since we'd already been working on parallel programming technologies, we found the whole workshop rather basic. But on a more positive note, I got to see IIT-M and Chennai in general. And the taste of good old south Indian food was quite a relief!

Guess I'm done for the time being. I anxiously await the Sun Code For Freedom (CFF) results that will be out next week. It'll be interesting to see which awesome project ends up winning. :)